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Fremont Micro Devices
PIN CONFIGURATION
Top View
FT822 Preliminary
FB
1
8 VCC
COMP 2
MULT 3
7 GATE
6 GND
CS 4
5
AUX
Figure 2: Pin Assignments
TERMINAL DESCRIPTION
No.
1
2
3
4
5
6
7
8
PIN
FB
COMP
MULT
CS
AUX
GND
GATE
VCC
FUNCTION
Inverting input of error amplifier. The information on the output is fed into the pin through
an opto-coupler. The pin also as an ON/OFF control input.
Output of the error amplifier. A compensation network is placed between this pin and FB
( pin #1) to achieve stability of the control loop and ensure high power factor and low
current THD.
Main input to the multiplier. This pin is connected to the rectified mains voltage via a
resistor divider and provides the sinusoidal reference to the current loop.
Input to the PWM comparator. The current flowing through the MOSFET is sensed by a
resistor, the resulting voltage together with line compensation voltage is applied to this pin
and compared with an internal sinusoidal-shaped reference, generated by the multiplier, to
determine MOSFET’s turn-off.
Input from auxiliary winding sensing resistor divider for demagnetization timing,
A negative-going edge after MOSFET’s minimum off time triggers MOSFET’s turn-on.
AUX double as OSCP and adjustable OVP latch protection input.
Ground.
Gate drive output.
Supply Voltage of both the signal part of the IC and the gate driver.
Table1
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DS822 –A2
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